FantasticSearch

ACTIONS Technical description of the Initiative: scope of actions The initial and, where appropriate, subsequent actions supported by the Initiative shall be implemented in accordance with the following technical description: Part I Design capacities for integrated semiconductor technologies The Initiative shall build up large-scale innovative design capacities for integrated semiconductor technologies through a virtual design platform available across the Union. The virtual design platform will consist of new innovative design facilities with extended libraries and tools, integrating a large number of existing and new technologies (including emerging technologies such as integrated photonics, quantum and AI/neuromorphic). In combination with existing EDA tools, it will allow the design of innovative components and new system concepts and demonstrate key functionalities such as new approaches to high performance, low energy, security, new 3D and heterogeneous system architectures, etc.

Working closely with the user industries from a variety of economic sectors, the virtual design platform will connect the communities of design houses, IP and tool suppliers with research and technology organisations (RTOs) to provide virtual prototype solutions on the basis of co-development of technology. Risks and development costs will be shared and new web-based methods of accessing design tools, with flexible cost models, especially for prototyping, and common interface standards will be promoted. The virtual design platform shall be continuously upgraded with new design capabilities as it continuously integrates more and more technologies and designs for low-power processors (including open-source, such as RISC-V). Furthermore, the virtual design platform may enable the design of other technologies, such as programmable chips based on field programmable gate arrays, new 3D and heterogeneous system architectures, etc. It will offer its services via the cloud, maximising access and openness to the whole community by networking existing and new design centres across the Member States. Part II Pilot lines for preparing for innovative production, testing and validation

The Initiative shall support pilot lines for production, testing and validation bridging the gap from the lab to the fab of advanced semiconductor technologies, such as architectures and materials for power electronics fostering sustainable and renewable energy, energy storage, smart manufacturing in accordance with the highest environmental standards, automation and electro mobility, lower energy consumption, cyber security, functional safety, higher levels of computing performance or integrating breakthrough technologies such as neuromorphic and embedded AI chips, integrated photonics, graphene and other 2D-material-based technologies, integrating electronics and microfluidics in heterogeneous systems, technological solutions for increased sustainability and circularity of electronic components and systems. Focus areas include the following:

(a) Pilot lines to experiment, test, and validate, including through process design kits, the performance of IP blocks, virtual prototypes, new designs and novel integrated heterogeneous systems in an open and accessible way. The virtual design platform will allow design exploration of new IP blocks and new system concepts to be tested and validated on the pilot lines through early process design kits, providing immediate feedback to refine and improve the models before transfer to manufacturing. From the start, the Initiative will expand several existing pilot lines, in synergy with the design infrastructure, to enable access for design and (virtual) prototyping projects.

(b) New pilot lines on semiconductor technologies such as fully depleted silicon on insulator down to 10-7 nm, advanced gate-all-around and leading-edge nodes (e.g. below 2 nm), complemented by pilot lines for 3D heterogeneous systems integration and advanced packaging. The pilot lines will be integrating the latest research and innovation activities and their results. The pilot lines will include a dedicated design infrastructure consisting for example of design models simulating the fabrication process for the design tools used to design circuits and systems-on-chip. This design infrastructure and a user-friendly virtualisation of the pilot lines will be established that will make them directly accessible throughout the Union via the virtual design platform. Such a link will enable the design community to test and validate technology options before these become commercially available. It will ensure that new chip and system design fully exploit the potential of new technologies and deliver cutting edge innovation. Together, these pilot lines will advance the Union’s IP, skills and innovation in semiconductor manufacturing technology and will reinforce and expand the Union’s position in new manufacturing equipment and materials for advanced semiconductor technology modules, such as e.g. lithography and wafer technologies. Close concertation and collaboration with industry shall be organised to guide this capacity expansion and the critical inclusion from the start of selected qualified pilot lines involving for example advanced packaging, 3D heterogeneous integration technology and important additional functionalities such as silicon photonics, power electronics, sensing technologies, silicon graphene and quantum technologies. This powerful extended Union-wide pilot line infrastructure, intimately connected with the design enablement infrastructure, is fundamental for expanding the Union’s knowledge, capacity and capabilities to close the innovation gap from publicly funded research to commercially funded manufacturing, and to increase both demand and manufacturing in the Union by the end of the decade.

Part III Advanced technology and engineering capacities for quantum chips The Initiative shall address the specific needs of the future generation of information-processing components exploiting non-classical principles, in particular chips exploiting quantum effects (i.e. quantum chips) on the basis of research activities. Focus areas include the following:

(a) Innovative design libraries for quantum chips building on the design and fabrication processes of the well-established processes of the classical semiconductor industry for semiconductor- and photonics-based qubit platforms; complemented by the development of innovative and advanced design libraries and fabrication processes for the alternative qubit platforms that are not compatible with semiconductors.

(b) Pilot lines for the integration of quantum circuits and control electronics for building quantum chips building on and capitalising on ongoing research; and, for providing access to dedicated clean rooms and foundries for prototyping and production, reducing the entry-barrier for the development and production of small volumes of quantum components and accelerating the innovation cycles.

(c) Facilities for testing and validating advanced quantum components, including those produced by the pilot lines, closing the innovation feedback loop between designers, producers and users of quantum components. Part IV A network of competence centres and skills development The Initiative shall support the following:

(a) The creation of a network of competence centres in each Member State to promote the use of these technologies, acting as interfaces to the virtual design platform and pilot lines, facilitating their effective use, and providing expertise and skills to the stakeholders, including end-user SMEs. Competence centres will provide innovative services to industry, with particular attention to SMEs, academia and public authorities delivering tailored solutions to a wide variety of users that will foster wider uptake of design and advanced technology in the Union. They will also assist in growing a highly skilled work force in the Union.

(b) On skills, specific training actions will be organised around design tools and semiconductor technologies at a local, regional or Union-wide level. Scholarships for graduate studies will be supported. These actions will complement industrial commitments under the Pact for Skills, increasing the number of internships and apprenticeships, in collaboration with academia. Attention will also be paid to reskilling and upskilling programs for workers transferring from other sectors. Part V Chips Fund activities for access to capital by start-ups, scale-ups, SMEs and other companies in the semiconductor value chain The Initiative shall support the creation of a thriving semiconductor and quantum innovation ecosystem by supporting wide access to venture capital for start-ups, scale-ups and SMEs to grow their business and expand their market presence in a sustainable manner.